Power-Constrained Testing of VLSI Circuits - Bog af Nicola Nicolici & Bashir M. Al-Hashimi - Paperback

Power-Constrained Testing of VLSI Circuits - Nicola Nicolici

Minimization of power dissipation in very large scale integrated (VLSI) circuits is important to improve reliability and reduce packaging costs. While many techniques have investigated power minimization during the functional (normal) mode of operation, it is important to examine the power dissipation during the test circuit activity is substantially higher during test than during functional operation. For example, during the execution of built-in self-test (BIST) in-field sessions, excessive power..