Design-for-Test and Test Optimization Techniques for TSV-based 3D Stacked ICs - Krishnendu Chakrabarty
This book describes innovative techniques to address the testing needs of 3D stacked integrated circuits (ICs) that utilize through-silicon-vias (TSVs) as vertical interconnects. The authors identify the key challenges facing 3D IC testing and present results that have emerged from cutting-edge research in this domain.
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